Module stm32_metapac::timer::regs

Structs§

  • auto-reload register
  • auto-reload register
  • break and dead-time register
  • capture/compare enable register
  • capture/compare enable register
  • capture/compare mode register 1 (input mode)
  • capture/compare mode register 2 (output mode)
  • capture/compare register 1
  • capture/compare register 1
  • counter
  • counter
  • control register 1
  • control register 1
  • control register 2
  • control register 2
  • control register 2
  • DMA control register
  • DMA/Interrupt enable register
  • DMA/Interrupt enable register
  • DMA/Interrupt enable register
  • DMA address for full transfer
  • event generation register
  • event generation register
  • event generation register
  • prescaler
  • repetition counter register
  • slave mode control register
  • status register
  • status register
  • status register